2. Create simple "Add" Block, and generate RTL by HDL Coder in Simulink [HDL coder + Zynq Project]

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4. Integrate HDL Coder-Add Block into IP catalog [HDL coder + Zynq Project]

Converting a Simulink Matlab to VHDL/Verilog Code | Step-by-Step Guide Tutorial

What Is HDL Coder?

Export Simulink Design by HDL Coder

How to Generate Multicycle Path Constraints in HDL Coder

1.How to use Vivado 2013.3 IP Integrator for Zynq [HDL coder + Zynq Project]

6.Run Synthesis,Implementaion,Generate Bitstream,Export to SDK [HDL coder + Zynq Project]

HDL Coder Demo